The present invention relates to an image display method for gradation display by display means having pixels arranged in a matrix, and a device used for its execution.
Recently, image display devices of flat panel type using LCD (liquid crystal display), PDP (plasma display panel), and the like are used in various fields.
In this kind of image display device, generally, plural pixels are arranged in a matrix, scanning lines are disposed in the horizontal direction, and data lines, in the vertical direction. Accordingly, by selecting an arbitrary scanning line, display data can be written in batch from the data line into the pixels on that scanning line. By writing in this way while sequentially selecting all scanning lines for composing one screen, display data can be written into all pixels, and one image is formed.
That is, the image display device of flat panel type employs a different control system from the CRT (cathode ray tube) for scanning an electron beam continuously from top to bottom, and from left to right.
As an example of a device employing such control method, an image display device using PDP is disclosed in "Improvement in the Picture Quality on a 20-Inch Color Gas-Discharge TV Display" in Technical Report EID89-73 of Electrocommunications Society (published Jan. 18, 1990).
FIG. 1 is a block diagram showing an example of constitution of essential parts of the conventional image display device using PDP. This image display device comprises a display unit 20 having plural pixels arranged in a matrix, a cathode driving circuit 21 for driving the cathode of a display element for composing each pixel 200, an anode driving circuit 22 for driving the anode of a display element, an auxiliary anode driving circuit 221, a display control unit 23, and a field memory 24 for storing and holding display data.
In the display unit 20, moreover, plural cathode lines 201 are disposed in the horizontal direction, and plural anode lines 202 and auxiliary anode lines 203 are disposed in the vertical direction. The cathode of each pixel 200 is connected to one cathode line 201, and the anode is connected to one anode line 202.
Using this image display device, first, a method of displaying an image of single gradation will be described.
The display control unit 23 selects one out of the plural cathode lines 201. The cathode driving circuit 21 drives the selected cathode line 201 at a predetermined voltage level, and allows of writing into each pixel 200 on the selected cathode line 201. The display control unit 23 outputs an address to the field memory 24. The field memory 24 gives display data corresponding to each pixel 200 on the selected cathode line 201 on the basis of this address. The display data is on/off data corresponding to lighting or extinguishing of each pixel in the case of data for forming an image of single gradation.
The anode driving circuit 22 drives each anode line 202 at a predetermined voltage level in accordance with the display data, and writes display data into each pixel 200 on the selected cathode line 201.
The display control unit 23 selects different cathode lines 201 sequentially, and repeats same operation, so that display data can be written into all pixels 200 for composing the display unit 20, thereby displaying the image of single gradation.
Meanwhile, the auxiliary anode driving circuit 221 is a circuit for decreasing the delay time for starting discharge by discharging with preliminal auxiliary the pixels 200 before writing display data by the anode driving circuit 22.
Using the same image display device, a method of displaying an image having gradations (gradation image) is described. FIG. 2 is an explanatory diagram showing a method of displaying an image of 2.sup.8 gradations. The period required for forming one gradation image is called one field, and one field is divided into periods called sub-fields. In each sub-field, an image of single gradation is displayed, and by combining images of such single gradation, a gradation image can be displayed in one field.
In the case of gradation display, usually, the number of gradations is selected in 2.sup.N for the ease of control, and the division of the period of one field by this integer N is one sub-field. In the case of display in 2.sup.N gradations, the display data can be expressed in binary notation in N bits, and each sub-field corresponds to each bit of display data. That is, by defining the light emission time in each sub-field at a ratio of 2.sup.K (K=0, 1, . . . , N-1), each image of single gradation is weighted of luminance corresponding to each light emission time, so that an image of 2.sup.N gradations can be displayed.
In FIG. 2, supposing eight divided sub-fields to be seventh sub-field, sixth sub-field, fifth sub-field, zeroth sub-field, the display unit 20 is driven according to the seventh bit (MSB) of display data in the seventh sub-field, the sixth bit of display data in the sixth sub-field, the fifth bit of display data in the fifth sub-field, and so forth, and the zeroth bit (LSB) of display data in the zeroth sub-field.
In each sub-field, each cathode line 201 is selected sequentially, and display data is written in sequentially, as a result each pixel 200 to emit light starts to emit light sequentially. After lapse of different light emission time preset in each sub-field, each cathode line 201 is sequentially selected for extinguishing, and each pixel 200 is extinguished sequentially.
The light emission (display) time in each sub-field is, supposing to be 1 in the zeroth sub-field, 2 in the first sub-field, 4 in the second sub-field, 8 in the third sub-field, 16 in the fourth sub-field, 32 in the fifth sub-field, 64 in the sixth sub-field, and 128 in the seventh sub-field according to weighting by ratio, and, as a result, display of 2.sup.8 gradations is obtained.
In such conventional image display device, the light emission (display) time in the period of one field is short, and the utility rate of light emission time (the rate of light emission time in the period of one field) is very small. Therefore, as compared with the light emission performance of the display device itself, only a dark display is made.
For example, specifically describing by referring to FIG. 2, supposing the maximum light emission time in the seventh sub-field to be 100, it is 50 in the sixth sub-field, in the fifth sub-field, decreasing to half thereafter, and 0.78125 in the zeroth sub-field. Hence, the possible display time in the period of one field is 100+50+25+12.5+6.25+3.125+1.5625+0.78125=199.21875, and therefore if displayed at maximum brightness, only about 25% of the period of one field 100.times.8 is utilized, and it is very inefficient.
In "AC Type Plasma Display" in Journal of Society of Electricity, Vol. 116, No. 8, 1996, a method of driving the sub-fields by dividing the sub-fields further into the address period common in time and sustain period in the whole area. More specifically, in the address period, a feeble discharge is generated by scanning in every line according to the display data, and the wall charge is first accumulated in the display cells of the entire panel surface. Afterwards, in the sustain period, sustain pulses are applied simultaneously in display cells of the whole screen, and discharge is continued in the cells in which wall charge is formed, and the display is performed. Since the pulse applied in the address period can be narrowed, it is possible to drive in a very short period of 3 .mu.s or less per line when one second is composed of 60 frames each of which is divided into eight sub-fields.
Japanese Patent Application Laid-Open No. 6-242743 (1994) discloses a display method of enhancing the rate of display period executed in one field, by scanning the scanning lines at specified intervals changing gradually, and driving the display means using data of each bit of display data according to the intervals.